1. Field of Invention
The present invention relates to a method of manufacturing a depletion metal oxide semiconductor (MOS) device; particularly, it relates to a method of manufacturing a depletion MOS device with breakdown protection.
2. Description of Related Art
FIG. 1 shows a cross-section view of a prior art depletion double diffused drain MOS (DDDMOS) device. As shown in FIG. 1, a P-type well 11 and isolation regions 12 are formed in a P-type substrate 1 to define a device area 100. The isolation regions 12 for example are formed by local oxidation of silicon (LOCOS). In the device area 100, a gate 13, adrift region 14, a source 15a, a drain 15, a P-type heavily doped region 16, and a threshold voltage adjustment region 17 are formed. The P-type well 11 may instead be the substrate 1 itself. The drift region 14, the source 15a, the drain 15, and the threshold voltage adjustment region 17 are formed by lithography and implantation with N-type impurities. The P-type heavily doped region 16 is formed by lithography and implantation with P-type impurities. The source 15a and the drain 15 are located beneath the gate 13 at both sides thereof, respectively. The drift region 14 is located at the drain side and part of it is beneath the gate 13. Part of the threshold voltage adjustment region 17 is beneath the gate 13; the threshold voltage adjustment region 17 converts an enhancement device to a depletion device, and it also serves for adjusting the threshold voltage of the depletion MOS device. The source 15a and the P-type heavily doped region 16 are separated by an isolation region 12. Because both the threshold voltage adjustment region 17 and the drift region 14 are doped with N-type impurities, breakdown more likely occurs in the depletion MOS device as compared to an enhancement MOS device. Particularly, at the region indicated by a dash-lined circle, i.e., the region beneath the edge of the gate 13 at the drain side, band-to-band breakdown easily occurs, so the depletion MOS device has a lower breakdown voltage. The lower breakdown voltage limits the applications of the prior art depletion MOS device.
FIG. 2 shows a cross-section view of a prior art depletion lateral diffused metal oxide semiconductor (LDMOS) device. Compared to the prior art shown in FIG. 1, the depletion LDMOS device shown in FIG. 2 has a body 18, and part of its gate 13 is located on the isolation region 12. Still similarly, this prior art depletion LDMOS device has the same problem as the aforementioned depletion DDDMOS device, that is, band-to-band breakdown easily occurs at the region indicated by a dash-lined circle shown in FIG. 2, and the low breakdown voltage limits its applications.
FIG. 3 shows a cross-section view of another prior art, which is another type of depletion double diffused drain MOS device, referred to as a depletion DMOS device. Similarly, this prior art depletion DMOS device has the same problem that band-to-band breakdown easily occurs at the region indicated by a dash-lined circle shown in FIG. 3, and the low breakdown voltage limits its applications.
Conventionally, to solve the aforementioned problem, engineers focused their studies on adjusting the densities or the diffusion regions of the impurities which form the drift region 14, the source 15a, the drain 15, and the threshold voltage adjustment region 17, but no effective solution has been proposed. The reason is thus: a circuit generally does not only include depletion MOS devices, but also includes enhancement MOS devices. In a manufacturing process of the circuit, the same implantation parameters for the drift regions 14, the sources 15a, and the drains 15 are applied to both enhancement and depletion MOS devices, and next the threshold voltage adjustment region 17 is formed in the depletion MOS devices to convert selected enhancement MOS devices to depletion MOS devices. In other words, the enhancement devices and the depletion devices use the same parameters for the drift regions 14, the sources 15a, and the drains 15; if any parameter of the depletion devices is adjusted, it will impact the performance of the enhancement devices. Therefore, from the manufacturing point of view, the only parameter which can be adjusted is the implantation parameter of the threshold voltage adjustment region 17. However, the impurity density of the threshold voltage adjustment region 17 can not be too low, or else the selected enhancement devices can not be converted to depletion devices. Therefore, restricted by the aforementioned limitations, the prior art can not solve the band-to-band breakdown problem effectively.
In view of the foregoing, the present invention provides a method of manufacturing a depletion MOS device, which can increase the breakdown voltage of the device to broaden its applications.